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mos6581 [2011/10/03 20:52] – [Power Supply] wadminmos6581 [2018/08/26 09:36] (current) – external edit 127.0.0.1
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 {{cnmos.JPG}} {{cnmos.JPG}}
 +
 +**UNDER CONSTRUCTION - FOR INFORMATION ONLY**
  
 **Foreword :**  **Foreword :** 
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   * personnal SID experience/findings.   * personnal SID experience/findings.
  
-All the sources are listed in the last section of the Datasheet.+All the sources are listed in the last section of the Datasheet. It covers all chip versions from 6581 to 8580, the relevant information for each version are precised in the associated chapter when necessary.
  
 == Once upon a time... == == Once upon a time... ==
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 |  Filter    **21**  |  1  |  0  |  1  |  0  |  1  |  ''15''  |      |      |      |      |      |  FC2    FC1    FC0    **Filter Cut Freq Low**  |  W  | |  Filter    **21**  |  1  |  0  |  1  |  0  |  1  |  ''15''  |      |      |      |      |      |  FC2    FC1    FC0    **Filter Cut Freq Low**  |  W  |
 |  :::      |  **22**  |  1  |  0  |  1  |  1  |  0  |  ''16''  |  FC10  |  FC9    F08    FC7    FC6    F05    FC4    F03    **Filter Cut Freq High**  |  W  | |  :::      |  **22**  |  1  |  0  |  1  |  1  |  0  |  ''16''  |  FC10  |  FC9    F08    FC7    FC6    F05    FC4    F03    **Filter Cut Freq High**  |  W  |
-Together these registers form an 11-bit number (bits 3-7 of FC LO are not used) which linearly controls the Cutoff (or Center) Frequency of the programmable Filter. The approximate Cutoff Frequency ranges between 30Hz and 10KHz with the recommended capacitor values of 2200pF for CAP1 and CAP2. The frequency range of the Filter can be altered to suit specific applications. Refer to the Pin Description section for more information. +Together these registers form an 11-bit number (bits 3-7 of FC LO are not used) which linearly controls the Cutoff (or Center) Frequency of the programmable Filter. The approximate Cutoff Frequency ranges between 30Hz and 10KHz with the recommended capacitor values for CAP1 and CAP2. The frequency range of the Filter can be altered to suit specific applications. Refer to the Pin Description section for more information. 
  
 ==== 6 - Filter Res & Signal Source Routing ==== ==== 6 - Filter Res & Signal Source Routing ====
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 Pins decription can be found herebelow. Consider jumping to next section for maximum ratings. Pins decription can be found herebelow. Consider jumping to next section for maximum ratings.
 +{{ mos6581.png}}
  
 ==== Power Supply ==== ==== Power Supply ====
-SID power consumption during normal operation is 600mW.+SID power consumption during normal operation is around 600mW. Expect a little more from a 6581 (around 650mW), and less from 6582 and 8580 (around 550W). 
 +The SID shall heat a lot during operation. The design of the analog part of the chip has been improved from 6581 to 6582/8580, allowing to reduce the operating voltage of the chip, and at the same time lowering its consumed power.
  
 +This also means that 6581 and 6582/8580 __are not compatible__. The power voltages listed below shall be respected, otherwise SID might be damaged.
  
 === VCC - Pin 25 === === VCC - Pin 25 ===
 This pin shall be powered by a 5V DC coupled power supply.  This pin shall be powered by a 5V DC coupled power supply. 
-About 70mA is drawn from VCC during normal operation. Coupling capacitor of at least 1uf is recommended for proper operation.+About 70mA is drawn from VCC during normal operation. Coupling capacitor of at least 10uf and filtering capacitor of 100nf are recommended for proper operation.
  
-  
 === VDD - Pin 28 === === VDD - Pin 28 ===
 This pin shall be connected to either 9V or 12V DC coupled power supply, according to your SID chip version: This pin shall be connected to either 9V or 12V DC coupled power supply, according to your SID chip version:
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 |  8580  |  :::  |  :::  | |  8580  |  :::  |  :::  |
  
-Coupling capacitor of at least 100nf is recommended.+Filtering capacitor of 100nf is recommended. 
 + 
 +=== GND - Pin 14 === 
 +Signal Grounds. To lower the noise, the digital and analog ground shall be connected together on this pin and only at it. Keep in mind that the VDD is used only by the analog part of the chip, which includes it inside the analog section. This makes a basic ground plane domain for analog around pins 26, 27 and 28. 
 + 
 + 
 +==== Filter Configuration ==== 
 + 
 +=== CAP1A CAP1B CAP2A CAP2B - Pin 1-2 & Pin 3-4 === 
 +These pins are used to connect the two integrating capacitors required by the internal state variable filter to operate. Both caps shall be identical, and matched if the user intends to mix several MOS together. Since the design has been significantly updated from 6581 to 8580 versions, the basic values for the capacitor changes from one version to the other. The following cap values are given for a nominal 20Hz - 12kHz range: 
 +^Version^Cap value^Max Freq^ 
 +|6581|1 to 2nF|10k, provided Fmax=0.000026/Cap| 
 +|6582|6.8nF|12k, provided Fmax=0.000052/Cap| 
 +|8580|6,8nF|:::
 +//Note: Depending on the 6581 version, early units require 1nF as per 1986 datasheet. However there are few of those units out here.// 
 + 
 +Increasing the capacitor value shifts the maximum filter output frequency down, allowing more tuning control capability over the 11bit control range of the filter. Basic asumption of the maximum filter frequency is given column 3 of the table above. The filter control range covers 9 octaves below the Fmax frequency 
 + 
 +Both capacitors shall be implemented as close as possible to the chip. The signal flowing through them is analog. 
 + 
 +==== Digital Pins ==== 
 + 
 +=== _RES - Pin 5 === 
 +This TTL-level input is the reset control for SID. When brought low for at least ten Ø2 cycles, all internal registers are reset to zero and the audio output is silenced. This pin is normally connected to the reset line of the microprocessor or a power-on-clear circuit.  
 + 
 +=== Ø2 - Pin 6 ===  
 +This TTL-level input is the master clock for SID. Ø2 controls both system data transfers between SID and the microprocessor and the DDS synth.  
 + 
 +__System Clock :__ Data can only be transferred when Ø2 is high. Essentially, Ø2 acts as a high-active chip select as far as data transfers are concerned. This pin is normally connected to the system clock, with a nominal operating frequency of 1.0 MHz. The clock can be cristal based or generated by another component like a microprocessor timer. 
 + 
 +__DDS Synth :__ The 1Mhz clock also drives the phase accumulator counter that DDS synth uses. As a consequence, the accuracy of the Ø2 clock frequency is linked to the accurate tuning of the audio outputs, aside from a good configuration of the frequency registers. Hence, great care shall be given to the Ø2 clock source in terms of jitter and skew for accurate tuning.  
 + 
 +=== R/_W - Pin 7 === 
 +This TTL-level input controls the direction of data transfers between SID and the microprocessor. If the chip select conditions have been met, a high on this line allows the microprocessor to Read data from the selected SID register and a low allows the microprocessor to Write data into the selected SID register. This pin is normally connected to the system Read/Write line.  
 + 
 +=== _CS - Pin 8 === 
 +This TTL-level input is a low active Chip select which controls data transfers between SID and the microprocessor. /CS must be low for any transfer.  
 +^Action^_CS State^Ø2 State^R/_W State^ 
 +|**Read** | low | high | high | 
 +|**Write**| low | high | low |  
 + 
 +This pin is normally connected to address decoding circuitry, allowing SID to reside in the memory map of a system.  
 + 
 +=== A0-A4 - Pins 9-13 === 
 +These TTL-level inputs are used to select one of the 29 SID registers. The remaining three register locations are not used. A Write to any of these three locations is ignored and a Read returns invalid data.  
 + 
 +These pins are normally connected to the corresponding address lines of the microprocessor so that SID may be addressed in the same manner as memory.  
 + 
 +=== D0-D7 - Pins 15-22 === 
 +These bidirectional lines are used to transfer data between SID and the microprocessor. They are TTL compatible in the output mode and capable of driving 2 TTL loads in the output mode. The data buffers are usually in the high-impedance off state. During a Write operation, the data buffers remain in the off (input) state and the microprocessor supplies data to SID over these lines. During a Read operation, the data buffers turn on and SID supplies data to the microprocessor over these lines. The pins are normally connected to the corresponding data lines of the microprocessor.  
 + 
 +==== Analog Pins ==== 
 + 
 +=== POTX & POTY - Pins 24 & 23  
 +These pins are inputs to the A/D converters used to digitize the position of potentiometers. The conversion process is based on the time constant of a capacitor tied from the POT pin to ground, charged by a potentiometer tied from the POT pin to +5 volts. The component values are determined by **RC = 4.7E-4 ** where R is the maximum resistance of the pot and C is the capacitor. The larger the capacitor, the smaller the POT value jitter.  
 + 
 +**The recommended values for R and C are 470 KOhms and 1000 pF.**  
 + 
 +=== Ext In - Pin 26 ===  
 +This analog input allows external audio signals to be mixed with the audio output of SID or processed through the Filter. Typical sources include voice, guitar and organ. The input impedance of this pin is in the order of 100 KOhms. Any signal applied directly to the pin should ride at DC level of 6 volts and should not exceed 3 volts p-p. In order to prevent any interference caused by DC level differences, external signals should be AC-coupled to EXT IN by an electrolytic capacitor in the 1-10uF range. As the direct audio path (FILTEX = 0) has unity gain, EXT IN can be used to mix outputs of many SID chips by daisy-chaining. The number of chips that can be chained in this manner is determined by the amount of noise and distortion allowable at the final output. Note that the output Volume control will affect not only the three SID voices, but also any external inputs.  
 + 
 +=== Audio Out - Pin 27 ===  
 +This open-source buffer is the final audio output of SID, comprised of the three SID voices, the Filter and any external input. The output level is set by the output Volume control and reaches a maximum of approximately 3 volts p-p at a 6 volt DC level. A source resistor from AUDIO OUT to ground is required for proper operation. The recommended resistance is 1 KOhm for a standard output impedance. As the output of SID rides at a 6 volt DC level, it should be AC-coupled to any audio amplifier with an electrolytic capacitor in the 1-10uF range 
 + 
 + 
 + 
 + 
 + 
mos6581.1317675154.txt.gz · Last modified: 2018/08/26 09:36 (external edit)